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I have downloaded Xilinx 14.7 recently to implement partial reconfiguration on spartan 3E fpga. we need to indicate the project as partially reconfigurable at the...
Hi All,I need to create an AGC algorithm on FPGA. I am using some basic algorithm, but I receive input signal in every clock cycle.In AGC algorithm, in case I have...
I am currently working on an old board which have old FPGA SPRTAN which its not available on market on board and i dont have a source code for those FPGA's except...
1st project having issues with latches?
Started by 2 years ago●11 replies●latest reply 2 years ago●74 viewsHello,
So I am new to FPGA's and thought I would start an easy project which tries to recreate the Motorola MC14514 or 4 bit transparent latch/ 4 to 16 line decoder....
hey, I'll give a little background before I start, I've recently started with FPGA (I'm more used to PIC MCUs), which I'm planning to use with a high speed analog...
Reduce Phase of a filtered data set
Started by 2 years ago●3 replies●latest reply 2 years ago●45 viewsHi :)So when you filter data sets using moving average, median or any other filter, they produce some kind of shift and they cant properly follow the original...
Hi everyoneI am new in #FPGA programming, yet I have programming experience in using C, matlab, SQL, and other languages. I am assigned a task of creating a Windowing...
Hello everyone, I find a xilinx zynq single board computer Z-turn board, the price is attractive and I would like to order one for my evaluation. But I find it has...
Hi
I planning to do my research in Deep Learning in FPGA.
Can you suggest any specific research topics within this fiels ?
What is the scope of the field ?
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