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Launch of Youtube Channel: My First Videos - Embedded World 2017

Stephane Boucher April 5, 201721 comments

I went to Embedded World 2017 in Nuremberg with an ambitious plan; I would make video highlights of several exhibits (booths) to be presented to the *Related sites audience.  I would try to make the vendors focus their pitch on the essential in order to produce a one to three minutes video per booth.

So far my experience with making videos was limited to family videos, so I knew I had lots of reading to do and lots of Youtube videos and tutorials to watch.  Trade shows are...


New Comments System (please help me test it)

Stephane Boucher October 4, 201617 comments

I thought it would take me a day or two to implement, it took almost two weeks...

But here it is, the new comments systems for blogs, heavily inspired by the forum system I developed earlier this year.  

Which means that:

  • You can easily add images, either by drag and drop or through the 'Insert Image' button
  • You can add MathML, TeX and ASCIImath equations and they will be rendered with Mathjax
  • You can add code snippets and they will be highlighted with highlights.js
  • You can edit...

Use DPLL to Lock Digital Oscillator to 1PPS Signal

Michael Morris July 24, 20168 comments
Introduction

There are occasions where it is desirable to lock a digital oscillator to an external time reference such as the 1PPS (One Pulse Per Second) signal output from a GPS receiver. One approach would be to synchronize a fixed frequency oscillator on the leading edge of the 1PPS signal. In many cases, this will result in adequate performance. However, in situations where simple synchronization does not provide adequate performance, digital phase-lock techniques can be applied to a...


Summer of gateware is coming (again)

Christopher Felton April 29, 20162 comments

How time flies!  I swear my last post was a summary of the 2015 summer of gateware.  This year (2016) MyHDL is participating in the Google summer of code again, for the second year, continuing as a sub-org of the Python Software Foundation organization.

This year, so far, has been amazing and inspiring.  We have had many talented students inquire about the project and contribute to myhdl and


Data Types for Control & DSP

Tim Wescott April 26, 20166 comments

There's a lot of information out there on what data types to use for digital signal processing, but there's also a lot of confusion, so the topic bears repeating.

I recently posted an entry on PID control. In that article I glossed over the data types used by showing "double" in all of my example code.  Numerically, this should work for most control problems, but it can be an extravagant use of processor resources.  There ought to be a better way to determine what precision you need...


3 Good News

Stephane Boucher March 9, 20161 comment
Good News #1

Last week, I announced a new and ambitious reward program that will be funded by the new Vendors Directory.

This week, I am happy to announce that we have our firsts two sponsors!  Quantum Leaps & Abelon Systems have agreed to pay the sponsorship fee to be listed in the new Vendors Directory.  Because of their support, there is now some money in the reward pool ($1,000) and enough to pay for the firsts 500 'beers' awarded.  Please...


The New Forum is LIVE!

Stephane Boucher February 18, 20161 comment

After months of hard word, I am very excited to introduce to you the new forum interface.  

Here are the key features:

1- Easily add images to a post by drag & dropping the images in the editor

2- Easily attach files to a post by drag & dropping the files in the editor

3- Add latex equations to a post and they will be rendered with Mathjax (tutorial)

4- Add a code snippet and surround the code with


Running Average

Mike February 15, 20166 comments

The running average filter is a useful way to reduce noise in a system.  One project I recently worked on required a 4 times frequency output from an encoder input.  The problem was the encoder is mounted to the wheel of an old truck and bearing noise was making the original algorithm generate way too many pulses.  The original algorithm worked, but the noise on the input made it useless.

I first implemented the moving average based on


Ancient History

Mike January 18, 20168 comments

The other day I was downloading an IDE for a new (to me) OS.  When I went to compile some sample code, it failed.  I went onto a forum, where I was told "if you read the release notes you'd know that the peripheral libraries are in a legacy download".  Well damn!  Looking back at my previous versions I realized I must have done that and forgotten about it.  Everything changes, and keeping up with it takes time and effort.

When I first started with microprocessors we...


Dealing With Fixed Point Fractions

Mike January 5, 20163 comments

Fixed point fractional representation always gives me a headache because I screw it up the first time I try to implement an algorithm. The difference between integer operations and fractional operations is in the overflow.  If the representation fits in the fixed point result, you can not tell the difference between fixed point integer and fixed point fractions.  When integers overflow, they lose data off the most significant bits.  When fractions overflow, they lose data off...


How to start in FPGA development? - Some tips

Nuria Orduna August 30, 20123 comments
Introduction

The aim of this tutorial is to show some useful tips for people like me that one day started from zero to work with FPGA's. Why FPGA's? Because they are easy to use and they are not too expensive, and they are usually used in lab courses to let students "play" with them.

1: How to choose the right FPGA?

As you may know there are a lot of different FPGA's, brands and models. How to choose the right one? It's very difficult to say that before knowing which will be the...


Sensors Expo - Trip Report & My Best Video Yet!

Stephane Boucher August 3, 20183 comments

This was my first time at Sensors Expo and my second time in Silicon Valley and I must say I had a great time.  

Before I share with you what I find to be, by far, my best 'highlights' video yet for a conference/trade show, let me try to entertain you with a few anecdotes from this trip.  If you are not interested by my stories or maybe don't have the extra minutes needed to read them, please feel free to skip to the end of this blog post to watch the...


Running Average

Mike February 15, 20166 comments

The running average filter is a useful way to reduce noise in a system.  One project I recently worked on required a 4 times frequency output from an encoder input.  The problem was the encoder is mounted to the wheel of an old truck and bearing noise was making the original algorithm generate way too many pulses.  The original algorithm worked, but the noise on the input made it useless.

I first implemented the moving average based on


Linear Feedback Shift Registers for the Uninitiated, Part II: libgf2 and Primitive Polynomials

Jason Sachs July 17, 2017

Last time, we looked at the basics of LFSRs and finite fields formed by the quotient ring \( GF(2)[x]/p(x) \).

LFSRs can be described by a list of binary coefficients, sometimes referred as the polynomial, since they correspond directly to the characteristic polynomial of the quotient ring.

Today we’re going to look at how to perform certain practical calculations in these finite fields. I maintain a Python library called libgf2,...


Makefiles for Xilinx Tools

Victor Yurkovsky May 12, 20155 comments

Building a bitstream from an HDL is a complicated process that requires the cooperation of a lot of tools.  You can hide behind an IDE or grow a pair and use command line tools and a makefile to tie your build process together.  I am not a huge fan of makefiles either (I believe a language should be expressive enough to automate the build process), but the alternatives are dismal. 

Command-line driven workflow is easier on the hands and faster.  The example...


How to start in FPGA development? - Simulation software tools

Nuria Orduna September 19, 20128 comments
Introduction

This post is related to the first post How to start in FPGA development? - Some tips which aimed to show other options to work on the simulation of your project. In this first approach will be explained some advantages and disadvantages of using Xilinx ISE (+ModelSim) or using ModelSim, Precision and Xilinx ISE. And finally my opinion of which are the ones I...


MyHDL FPGA Tutorial II cont. (Echo, Audio Interface)

Christopher Felton September 13, 201210 comments
Introduction

To demonstrate the echo on an FPGA board an interface to an audio ADC/DAC chip will be used. The following will explain the connection to the audio codec and the HDL module used to interface.

Audio Codec Interface

I have two boards with TI AIC23b audio codecs. The AIC23 has a configuration interface (ability to program the registers) and a streaming audio interface. The SPI mode will be used to configure the codec and the I2S interface is used to send and...


StrangeCPU #4. Microcode

Victor Yurkovsky May 13, 20137 comments
Summary:

Sliding windows containing runs of microcode.

Table of Contents:

Finally got a drone!

Stephane Boucher August 28, 20172 comments

As a reader of my blog, you already know that I have been making videos lately and thoroughly enjoying the process.  When I was in Germany early this summer (and went 280 km/h in a porsche!) to produce SEGGER's 25th anniversary video, the company bought a drone so we could get an aerial shot of the party (at about the 1:35 mark in this video).  Since then, I have been obsessing on buying a drone for myself and finally made the move a few weeks ago - I acquired a used DJI...


The Spartans

Christopher Felton February 20, 20104 comments

The latest release of the Xilinx Spartan family is the Spartan6 line of FPGAs. It has been awhile since the last major Spartan released, the Spartan3, but this last year Xilinx released the Spartan6. The Xilinx Spartan family is the low cost FPGAs compared to the higher cost and high performance Virtex family. The Spartan family is derived from the Virtex architecture with some changes to reduce the cost. The Spartan3 FPGAs were derived from the Virtex-II architecture. Since the Spartan3...