## Elliptic Curve Key Exchange

Elliptic Curve Cryptography is used to create a Public Key system that allows two people (or computers) to exchange public data so that both sides know a secret that no one else can find in a reasonable time. The simplest method uses a fixed public key for each person. Once cracked, every message ever sent with that key is open. More advanced key exchange systems have "perfect forward secrecy" which means that even if one message key is cracked, no other message will...

## Discrete-Time PLLs, Part 1: Basics

Design Files: Part1.slx

Hi everyone,

In this series of tutorials on discrete-time PLLs we will be focusing on Phase-Locked Loops that can be implemented in discrete-time signal proessors such as FPGAs, DSPs and of course, MATLAB.

In the first part of the series, we will be reviewing the basics of continuous-time baseband PLLs and we will see some useful mathematics that will give us insight into the inners working of PLLs. In the second part, we will focus on...

## Polynomial Inverse

One of the important steps of computing point addition over elliptic curves is a division of two polynomials. When working in $GF(2^n)$ we don't have large enough powers to actually do a division, so we compute the inverse of the denominator and then multiply. This is usually done using Euclid's method, but if squaring and multiplying are fast we can take advantage of these operations and compute the multiplicative inverse in just a few steps.

The first time I ran across this...

## One Clock Cycle Polynomial Math

Error correction codes and cryptographic computations are most easily performed working with $GF(2^n)$ polynomials. By using very special values of $n$ we can build circuits which multiply and square in one clock cycle on an FPGA. These circuits come about by flipping back and forth between a standard polynomial basis and a normal basis representation of elements in $GF(2^n)$.

A normal basis is yet another form of polynomial but instead of adding powers of $\beta$ we add...

## Elliptic Curve Cryptography

Secure online communications require encryption. One standard is AES (Advanced Encryption Standard) from NIST. But for this to work, both sides need the same key for encryption and decryption. This is called Private Key encryption. Public Key encryption is used to create a private key between two sides that have not previously communicated. Compared to the history of encryption, Public Key methods are very recent having been started in the 1970's. Elliptic...

## An absolute position encoder VHDL core

IntroductionLet's consider motorized systems controlled by electronics. A closed loop architecture looks like this:

The following components are involved:

- the motor itself (DC, stepper ...),
- the controller, in charge of computing position according to the whole system state,
- the driver board in charge of generating signals and power for the motor,
- the position encoder, the subject of this post.

Most of the time, there is a difference between the position the system...

## Helping New Bloggers to Break the Ice: A New Ipad Pro for the Author with the Best Article!

Breaking the ice can be tough. Over the years, many individuals have asked to be given access to the blogging interface only to never post an article. Maybe they underestimated the time it takes to write a decent article, or maybe they got cold feet. I don't blame or judge them at all - how many times in my life have I had the intention to do something but didn't follow through? Once, maybe twice 😉 (don't worry if you don't...

## Polynomial Math

Elliptic Curve Cryptography is used as a public key infrastructure to secure credit cards, phones and communications links. All these devices use either FPGA's or embedded microprocessors to compute the algorithms that make the mathematics work. While the math is not hard, it can be confusing the first time you see it. This blog is an introduction to the operations of squaring and computing an inverse over a finite field which are used in computing Elliptic Curve arithmetic. ...

## Welcoming MANY New Bloggers!

The response to the latest call for bloggers has been amazing and I am very grateful.

In this post I present to you the individuals who, so far (I am still receiving applications at an impressive rate and will update this page as more bloggers are added), have been given access to the blogging interface. I am very pleased with the positive response and I think the near future will see the publication of many great articles, given the quality of the...

## Recruiting New Bloggers!

Previous calls for bloggers have been very successful in recruiting some great communicators - Rick Lyons, Jason Sachs, Victor Yurkovsky, Mike Silva, Markus Nentwig, Gene Breniman, Stephen Friederichs,

## StrangeCPU #1. A new CPU

Summary: In this multi-part series I will share with you a design, implementation notes and code for a slightly different kind of a CPU featuring a novel token machine that resolves an 8-bit token to pretty much any address in a 32-bit or even 64-bit address space, using not much more than an adder.

Table of Contents:- Part 1: A new CPU - technology review, re-examination of the premises; StrangeCPU concepts; x86 notes.

## MyHDL Resources and Projects

Last updated 07-Nov-2017

MyHDL ResourcesIf you want to dive into MyHDL (digital hardware description in Python) there are many resources available. Below is a list of MyHDL resources, including some of the past blogs here on fpgarelated.

The MyHDL manual is a great (probably the best) place to get started.

The manual is an in-depth introduction to MyHDL. The concepts are well explained and there are examples to test while working through the...

## Feedback Controllers - Making Hardware with Firmware. Part I. Introduction

Introduction to the topicThis is the 1st in a series of articles looking at how we can use DSP and Feedback Control Sciences along with some mixed-signal electronics and number-crunching capability (e.g. FPGA), to create arbitrary (within reason) Electrical/Electronic Circuits with real-world connectivity. Of equal importance will be the evaluation of the functionality and performance of a practical design made from modestly-priced state of the art devices.

- Part 1:

## MyHDL FPGA Tutorial II cont. (Echo, Audio Interface)

IntroductionTo demonstrate the echo on an FPGA board an interface to an audio ADC/DAC chip will be used. The following will explain the connection to the audio codec and the HDL module used to interface.

Audio Codec InterfaceI have two boards with TI AIC23b audio codecs. The AIC23 has a configuration interface (ability to program the registers) and a streaming audio interface. The SPI mode will be used to configure the codec and the I2S interface is used to send and...

## Fit Sixteen (or more) Asynchronous Serial Receivers into the Area of a Standard UART Receiver

IntroductionThis article will describe a technique, available in many current FPGA architectures, to fit a large amount of logic into a small area. About ten years ago now (Feb/Mar 2005), I helped develop a multi-line Caller ID product. The Multi-Channel Asynchronous Receiver (MCAR) FPGA core developed for that product will be used to illustrate the technique(s) needed to fit a 16 channel MCAR into a single Spartan II XC2S30-5VQ100 FPGA.

To stay true to the original design, I...

## How precise is my measurement?

Some might argue that measurement is a blend of skepticism and faith. While time constraints might make you lean toward faith, some healthy engineering skepticism should bring you back to statistics. This article reviews some practical statistics that can help you satisfy one common question posed by skeptical engineers: “How precise is my measurement?” As we’ll see, by understanding how to answer it, you gain a degree of control over your measurement time.

An accurate, precise...## Crowdfunding Articles?

Many of you have the knowledge and talent to write technical articles that would benefit the EE community. What is missing for most of you though, and very understandably so, is the time and motivation to do it.

But what if you could make some money to compensate for your time spent on writing the article(s)? Would some of you find the motivation and make the time?

I am thinking of implementing a system/mechanism that would allow the EE community to...

## An absolute position encoder VHDL core

IntroductionLet's consider motorized systems controlled by electronics. A closed loop architecture looks like this:

The following components are involved:

- the motor itself (DC, stepper ...),
- the controller, in charge of computing position according to the whole system state,
- the driver board in charge of generating signals and power for the motor,
- the position encoder, the subject of this post.

Most of the time, there is a difference between the position the system...

## How to start in FPGA development? - Simulation software tools

IntroductionThis post is related to the first post How to start in FPGA development? - Some tips which aimed to show other options to work on the simulation of your project. In this first approach will be explained some advantages and disadvantages of using Xilinx ISE (+ModelSim) or using ModelSim, Precision and Xilinx ISE. And finally my opinion of which are the ones I...

## Linear Feedback Shift Registers for the Uninitiated, Part II: libgf2 and Primitive Polynomials

Last time, we looked at the basics of LFSRs and finite fields formed by the quotient ring \( GF(2)[x]/p(x) \).

LFSRs can be described by a list of binary coefficients, sometimes referred as the polynomial, since they correspond directly to the characteristic polynomial of the quotient ring.

Today we’re going to look at how to perform certain practical calculations in these finite fields. I maintain a Python library on bitbucket called...

## Went 280km/h (174mph) in a Porsche Panamera in Germany!

Those of you who've been following my blog lately already know that I am going through some sort of mid-life crisis that involves going out there to meet people and make videos. It all started with Embedded World early this year, then continued at ESC Boston a couple of months ago and the latest chapter just concluded as I returned from Germany after spending a week at SEGGER's headquarters to produce a video to highlight their 25th anniversary.

## MyHDL FPGA Tutorial II cont. (Echo, Audio Interface)

IntroductionTo demonstrate the echo on an FPGA board an interface to an audio ADC/DAC chip will be used. The following will explain the connection to the audio codec and the HDL module used to interface.

Audio Codec InterfaceI have two boards with TI AIC23b audio codecs. The AIC23 has a configuration interface (ability to program the registers) and a streaming audio interface. The SPI mode will be used to configure the codec and the I2S interface is used to send and...

## Finally got a drone!

As a reader of my blog, you already know that I have been making videos lately and thoroughly enjoying the process. When I was in Germany early this summer (and went 280 km/h in a porsche!) to produce SEGGER's 25th anniversary video, the company bought a drone so we could get an aerial shot of the party (at about the 1:35 mark in this video). Since then, I have been obsessing on buying a drone for myself and finally made the move a few weeks ago - I acquired a used DJI...

## Linear Feedback Shift Registers for the Uninitiated, Part I: Ex-Pralite Monks and Finite Fields

Later there will be, I hope, some people who will find it to their advantage to decipher all this mess.

— Évariste Galois, May 29, 1832

I was going to call this short series of articles “LFSRs for Dummies”, but thought better of it. What is a linear feedback shift register? If you want the short answer, the Wikipedia article is a decent introduction. But these articles are aimed at those of you who want a little bit deeper mathematical understanding,...

## Inside the Spartan-6: Using LUTs to optimize circuits

While building a small CPU on a Spartan-6 chip I came across the same old problem: my Verilog was mapping to a lot of slices . Way more then seems reasonable. So let's dig in and see what's really going on.

The J1 CPU (see Messing Around with a J1) is an amazingly streamlined design expressed in just over 100 lines of Verilog, and is reasonably compact at 150 Spartan-6 slices (half of that with the modifications described in the article). But the Picoblaze is...

## Designing Embedded System with FPGA - 1

With the introduction of soft processors and related tools (like EDK from Xilinx), implementation of basic embedded system in FPGA is made easy. This requires very little or almost no knowledge of VHDL programming. Actually that’s how I started. If user is interested in taking full advantage of FPGA and its parallel processing power, then yes, detail understanding of soft processor, its peripheral bus and VHDL programming is required.

I will start with...

## FPGA or DSP Processor - Parameters to Make the Right Choice

Introduction

Digital Signal Processing (DSP) has a huge global market that is growing fast day by day with rapidly evolving sophisticated modern electronics applications like 3G wireless, voice over internet protocol (VoIP), multimedia systems, radar and satellite systems, medical systems, image-processing applications and consumer electronics. These sophisticated DSP applications pose many conflicting challenges to system designers and application developers in terms of cost and...

## Dealing With Fixed Point Fractions

Fixed point fractional representation always gives me a headache because I screw it up the first time I try to implement an algorithm. The difference between integer operations and fractional operations is in the overflow. If the representation fits in the fixed point result, you can not tell the difference between fixed point integer and fixed point fractions. When integers overflow, they lose data off the most significant bits. When fractions overflow, they lose data off...

## Launch of Youtube Channel: My First Videos - Embedded World 2017

I went to Embedded World 2017 in Nuremberg with an ambitious plan; I would make video highlights of several exhibits (booths) to be presented to the *Related sites audience. I would try to make the vendors focus their pitch on the essential in order to produce a one to three minutes video per booth.

So far my experience with making videos was limited to family videos, so I knew I had lots of reading to do and lots of Youtube videos and tutorials to watch. Trade shows are...

## FPGA Assemblers and Time Machines

Flashback to 1986. A young man has a crazy idea - he wants to make a CPU all by himself. He is reading early Xilinx manuals cover to cover as if they were novels. Yes, you are quick - this is indeed a (mostly) true story about me and my dream, suddenly made possible by this new FPGA technology.

Sadly more than 20 years went by before my first CPU ran in a Xilinx FPGA. Why did it take so long? Every few years I set up the tools and every time I walked away, scared silly. As the years...