## How precise is my measurement?

Some might argue that measurement is a blend of skepticism and faith. While time constraints might make you lean toward faith, some healthy engineering skepticism should bring you back to statistics. This article reviews some practical statistics that can help you satisfy one common question posed by skeptical engineers: “How precise is my measurement?” As we’ll see, by understanding how to answer it, you gain a degree of control over your measurement time.

An accurate, precise...

## Embedded World 2018 - More Videos!

March 27, 20181 comment

After the interview videos last week, this week I am very happy to release two more videos taken at Embedded World 2018 and that I am proud of.

For both videos, I made extensive use of my two new toys, a Zhiyun Crane Gimbal and a Sony a6300 camera.

The use of a gimbal like the Zhiyun makes a big difference in terms of making the footage look much more stable and cinematographic.

As for the Sony camera, it takes fantastic slow-motion footage and...

## Feedback Controllers - Making Hardware with Firmware. Part 8. Control Loop Test-bed

March 21, 2018

This part in the series will consider the signals, measurements, analyses and configurations for testing high-speed low-latency feedback loops and their controllers. Along with basic test signals, a versatile IFFT signal generation scheme will be discussed and implemented. A simple controller under test will be constructed to demonstrate the analysis principles in preparation for the design and evaluation of specific controllers and closed-loop applications.

## Embedded World 2018 - The Interviews

March 21, 2018

Once again this year, I had the chance to go to Embedded World in Nuremberg Germany.  And once again this year, I brought my video equipment to try and capture some of the most interesting things at the show.

Something new this year, I asked Jacob Beningo if he would partner with me in doing interviews with a few vendors.  I would operate the camera while Jacob would ask the right questions to the vendors to make them talk about the key products/features that...

## Feedback Controllers - Making Hardware with Firmware. Part 7. Turbo-charged DSP Oscillators

This article will look at some DSP Sine-wave oscillators and will show how an FPGA with limited floating-point performance due to latency, can be persuaded to produce much higher sample-rate sine-waves of high quality.

Comparisons will be made between implementations on Intel Cyclone V and Cyclone 10 GX FPGAs. An Intel numerically controlled oscillator

## Feedback Controllers - Making Hardware with Firmware. Part 6. Self-Calibration Related.

This article will consider the engineering of a self-calibration & self-test capability to enable the project hardware to be configured and its basic performance evaluated and verified, ready for the development of the low-latency controller DSP firmware and closed-loop applications. Performance specifications will be documented in due course, on the project website here.

• Part 6: Self-Calibration, Measurements and Signalling (this part)
• Part 5:

## Feedback Controllers - Making Hardware with Firmware. Part 5. Some FPGA Aspects.

November 14, 2017
This part of the on-going series of articles looks at a variety of aspects concerning the FPGA device which provides the high-speed maths capability for the low-latency controller and the arbitrary circuit generator application. In due course a complete specification along with  application  examples will be maintained on the project website here.

## Feedback Controllers - Making Hardware with Firmware. Part 4. Engineering of Evaluation Hardware

October 10, 2017
Following on from the previous abstract descriptions of an arbitrary circuit emulation application for low-latency feedback controllers, we now come to some aspects in the hardware engineering of an evaluation design from concept to first power-up. In due course a complete specification along with  application  examples will be maintained on the project website.

## Feedback Controllers - Making Hardware with Firmware. Part 3. Sampled Data Aspects

September 9, 2017
Some Design and Simulation Considerations for Sampled-Data Controllers

This article will continue to look at some aspects of the controllers and electronics needed to create emulated physical circuits with real-world connectivity and will look at the issues that arise in sampled-data controllers compared to continuous-domain controllers. As such, is not intended as an introduction to sampled-data systems.

## Finally got a drone!

As a reader of my blog, you already know that I have been making videos lately and thoroughly enjoying the process.  When I was in Germany early this summer (and went 280 km/h in a porsche!) to produce SEGGER's 25th anniversary video, the company bought a drone so we could get an aerial shot of the party (at about the 1:35 mark in this video).  Since then, I have been obsessing on buying a drone for myself and finally made the move a few weeks ago - I acquired a used DJI...

## VHDL tutorial - combining clocked and sequential logic

March 3, 2008

In an earlier article on VHDL programming ("VHDL tutorial" and "VHDL tutorial - part 2 - Testbench", I described a design for providing a programmable clock divider for a ADC sequencer. In this example, I showed how to generate a clock signal (ADCClk), that was to be programmable over a series of fixed rates (20MHz, 10MHz, 4MHz, 2MHz, 1MHz and 400KHz), given a master clock rate of 40MHz. A reader of that article had written to ask if it was possible to extend the design to...

## MyHDL FPGA Tutorial II (Audio Echo)

July 18, 2012
Introduction

This tutorial will walk through an audio echo that can be implemented on an FPGA development board.  This tutorial is quite a bit more involved than the previous MyHDL FPGA tutorial.  This project will require an FPGA board with an audio codec and the interface logic to the audio codec.

Review the Previous Tutorial

The previous MyHDL FPGA tutorial I posted a strobing LED on an FPGA board.  In that tutorial we introduced the basics of a MyHDL module....

## Already 3000+ Attendees Registered for the Upcoming Embedded Online Conference

February 14, 2020

Chances are you already know, through the newsletter or banners on the Related sites, about the upcoming Embedded Online Conference.

Chances are you also already know that you have until the end of the month of February to register for free.

And chances are that you are one of the more than 3000 pro-active engineers who have already registered.

But If you are like me and have a tendency to do tomorrow what can be done today, maybe you haven't registered yet.  You may...

## Signed serial-/parallel multiplication

February 16, 2014

Keywords: Binary signed multiplication implementation, RTL, Verilog, algorithm

Summary
• A detailed discussion of bit-level trickstery in signed-signed multiplication
• Algorithm based on Wikipedia example
• Includes a Verilog implementation with parametrized bit width
Signed serial-/parallel multiplication

A straightforward method to multiply two binary numbers is to repeatedly shift the first argument a, and add to a register if the corresponding bit in the other argument b is set. The...

## VGA Output in 7 Slices. Really.

Ridiculous? Read on - I will show you how to generate VGA timing in seven XilinxR Spartan3R slices.Some time ago I needed to output video to a VGA monitor for my Apple ][ FPGA clone.  Obviously (I thought), VGA's been done before and all I had to do was find some Verilog code and drop it into my design.  As is often the case (with me anyway), the task proved to be very different from my imagined 'couple of hours to integrate the IP'.I found some example code for my board.  I...

## StrangeCPU #3. Instruction Slides - The Strangest CPU Yet!

Summary:

Decoding instructions with a Sliding Window system.  0-Bit Sliding Register Windows.

## Free Goodies from Embedded World - Full Inventory and Upcoming Draw Live-Streaming Date

March 22, 20191 comment

Chances are that you already know that I went to Embedded World a few weeks ago and came back with a bag full of "goodies".  Initially, my vision was to do a single draw for one person to win it all, but I didn't expect to come back with so much stuff and so many development kits.   Based on your feedback, it seems like you guys agree that It wouldn't make sense for one person to win everything as no-one could make good use of all the boards and there would be lots of...

## Verilog vs VHDL

June 13, 2011

Introduction

Verilog and VHDL are two industry standard Hardware Description Languages (HDL) that are used in writing programs for electronic integrated circuits (ICs) i.e., ASIC and FPGA. Many system designers face this issue: which HDL language to choose – Verilog or VHDL. The answer is by no means easy or trivial. Both of these languages are widely compared and contrasted without any clearly defined victor. Both of them have their own merits and demerits and have different...

## PC and SP for a small CPU

July 23, 2013

Ok, let's make a small stack-based CPU.

I will start where the rubber meets the road - the PC/stack subsystem that I like referring to as the 'legs'. As usual, I will present a design with a twist.

Not having a large design team, deadlines and million-dollar fab runs when designing CPUs creates a truly different environment. I can actually sit at the kitchen table and doodle around with CPU designs to my heart's content. I can try really ridiculous approaches, and work without a...

## Discrete-Time PLLs, Part 1: Basics

Design Files: Part1.slx

Hi everyone,

In this series of tutorials on discrete-time PLLs we will be focusing on Phase-Locked Loops that can be implemented in discrete-time signal proessors such as FPGAs, DSPs and of course, MATLAB.

In the first part of the series, we will be reviewing the basics of continuous-time baseband PLLs and we will see some useful mathematics that will give us insight into the inners working of PLLs. In the second part, we will focus on...

## Launch of Youtube Channel: My First Videos - Embedded World 2017

I went to Embedded World 2017 in Nuremberg with an ambitious plan; I would make video highlights of several exhibits (booths) to be presented to the *Related sites audience.  I would try to make the vendors focus their pitch on the essential in order to produce a one to three minutes video per booth.

So far my experience with making videos was limited to family videos, so I knew I had lots of reading to do and lots of Youtube videos and tutorials to watch.  Trade shows are...

I thought it would take me a day or two to implement, it took almost two weeks...

But here it is, the new comments systems for blogs, heavily inspired by the forum system I developed earlier this year.

Which means that:

• You can easily add images, either by drag and drop or through the 'Insert Image' button
• You can add MathML, TeX and ASCIImath equations and they will be rendered with Mathjax
• You can add code snippets and they will be highlighted with highlights.js
• You can edit...

## 3 Good News

March 9, 20161 comment
Good News #1

Last week, I announced a new and ambitious reward program that will be funded by the new Vendors Directory.