## SEGGER's 25th Anniversary Video

July 18, 20172 comments

Chances are you will find this video more interesting to watch if you take five minutes to first read the story of the week I spent at SEGGER's headquarters at the end of June.

The video is only a little more than 2 minutes long.  If you decide to watch it, make sure to go full screen and I would really love to read your thoughts about it in the comments down bellow.  Do you think a video like this succeeds in making the viewer want to learn more about the company?...

## Linear Feedback Shift Registers for the Uninitiated, Part II: libgf2 and Primitive Polynomials

July 17, 2017

Last time, we looked at the basics of LFSRs and finite fields formed by the quotient ring $GF(2)[x]/p(x)$.

LFSRs can be described by a list of binary coefficients, sometimes referred as the polynomial, since they correspond directly to the characteristic polynomial of the quotient ring.

Today we’re going to look at how to perform certain practical calculations in these finite fields. I maintain a Python library on bitbucket called...

## Went 280km/h (174mph) in a Porsche Panamera in Germany!

July 10, 201712 comments

Those of you who've been following my blog lately already know that I am going through some sort of mid-life crisis that involves going out there to meet people and make videos.  It all started with Embedded World early this year, then continued at ESC Boston a couple of months ago and the latest chapter just concluded as I returned from Germany after spending a week at SEGGER's headquarters to produce a video to highlight their 25th anniversary.

## Linear Feedback Shift Registers for the Uninitiated, Part I: Ex-Pralite Monks and Finite Fields

July 3, 20174 comments

Later there will be, I hope, some people who will find it to their advantage to decipher all this mess.

— Évariste Galois, May 29, 1832

I was going to call this short series of articles “LFSRs for Dummies”, but thought better of it. What is a linear feedback shift register? If you want the short answer, the Wikipedia article is a decent introduction. But these articles are aimed at those of you who want a little bit deeper mathematical understanding,...

## Going back to Germany!

June 13, 20176 comments

A couple of blog posts ago, I wrote that the decision to go to ESC Boston ended up being a great one for many different reasons.  I came back from the conference energized and really happy that I went.

These feelings were amplified a few days after my return when I received an email from Rolf Segger, the founder of SEGGER Microcontroller (check out their very new website), asking if I would be interested in visiting their headquarters...

## ESC Boston's Videos are Now Up

June 5, 2017

In my last blog, I told you about my experience at ESC Boston and the few videos that I was planning to produce and publish.  Here they are, please have a look and any feedback (positive or negative) is appreciated.

Short Highlight

This is a very short (one minute) montage of some of the footage that I shot at the show & conference.  In future shows, I absolutely need to insert clips here and there of engineers saying a few words about the conference (why they...

## Back from ESC Boston

May 6, 20172 comments

NOT going to ESC Boston would have allowed me to stay home, in my comfort zone.

NOT going to ESC Boston would have saved me from driving in the absolutely horrible & stressful Boston traffic1.

NOT going to ESC Boston would have saved me from having to go through a full search & questioning session at the Canada Customs on my return2.

2017/06/06 update: Videos are now up!

So two days...

## Launch of Youtube Channel: My First Videos - Embedded World 2017

April 5, 201721 comments

I went to Embedded World 2017 in Nuremberg with an ambitious plan; I would make video highlights of several exhibits (booths) to be presented to the *Related sites audience.  I would try to make the vendors focus their pitch on the essential in order to produce a one to three minutes video per booth.

So far my experience with making videos was limited to family videos, so I knew I had lots of reading to do and lots of Youtube videos and tutorials to watch.  Trade shows are...

October 4, 201618 comments

I thought it would take me a day or two to implement, it took almost two weeks...

But here it is, the new comments systems for blogs, heavily inspired by the forum system I developed earlier this year.

Which means that:

• You can easily add images, either by drag and drop or through the 'Insert Image' button
• You can add MathML, TeX and ASCIImath equations and they will be rendered with Mathjax
• You can add code snippets and they will be highlighted with highlights.js
• You can edit...

## Use DPLL to Lock Digital Oscillator to 1PPS Signal

July 24, 20162 comments
Introduction

There are occasions where it is desirable to lock a digital oscillator to an external time reference such as the 1PPS (One Pulse Per Second) signal output from a GPS receiver. One approach would be to synchronize a fixed frequency oscillator on the leading edge of the 1PPS signal. In many cases, this will result in adequate performance. However, in situations where simple synchronization does not provide adequate performance, digital phase-lock techniques can be applied to a...

## Little to no benefit from C based HLS

April 4, 2014

Last updated 07-Nov-2015

As I write this I am on a plane and my destination is EELive 2014 where I am going to give a talk hardware design: the grunge era.  It is a shotgun introduction to three alternative hardware description languages (alt.hdl). The three languages briefly introduced in the talk are: bsv, chisel, and myhdl.  The goal of the talk is simply to raise awareness of the three...

## PC and SP for a small CPU

July 23, 2013

Ok, let's make a small stack-based CPU.

I will start where the rubber meets the road - the PC/stack subsystem that I like referring to as the 'legs'. As usual, I will present a design with a twist.

Not having a large design team, deadlines and million-dollar fab runs when designing CPUs creates a truly different environment. I can actually sit at the kitchen table and doodle around with CPU designs to my heart's content. I can try really ridiculous approaches, and work without a...

## Elliptic Curve Cryptography

November 16, 20156 comments

Secure online communications require encryption.  One standard is AES (Advanced Encryption Standard) from NIST.  But for this to work, both sides need the same key for encryption and decryption.  This is called Private Key encryption.  Public Key encryption is used to create a private key between two sides that have not previously communicated.  Compared to the history of encryption, Public Key methods are very recent having been started in the 1970's.  Elliptic...

## Recruiting New Bloggers!

October 16, 20157 comments

Previous calls for bloggers have been very successful in recruiting some great communicators - Rick LyonsJason Sachs, Victor Yurkovsky, Mike Silva, Markus NentwigGene BrenimanStephen Friederichs,

## VGA Output in 7 Slices. Really.

September 25, 20121 comment

Ridiculous? Read on - I will show you how to generate VGA timing in seven XilinxR Spartan3R slices.Some time ago I needed to output video to a VGA monitor for my Apple ][ FPGA clone.  Obviously (I thought), VGA's been done before and all I had to do was find some Verilog code and drop it into my design.  As is often the case (with me anyway), the task proved to be very different from my imagined 'couple of hours to integrate the IP'.I found some example code for my board.  I...

## Use DPLL to Lock Digital Oscillator to 1PPS Signal

July 24, 20162 comments
Introduction

There are occasions where it is desirable to lock a digital oscillator to an external time reference such as the 1PPS (One Pulse Per Second) signal output from a GPS receiver. One approach would be to synchronize a fixed frequency oscillator on the leading edge of the 1PPS signal. In many cases, this will result in adequate performance. However, in situations where simple synchronization does not provide adequate performance, digital phase-lock techniques can be applied to a...

## Signed serial-/parallel multiplication

February 16, 2014

Keywords: Binary signed multiplication implementation, RTL, Verilog, algorithm

Summary
• A detailed discussion of bit-level trickstery in signed-signed multiplication
• Algorithm based on Wikipedia example
• Includes a Verilog implementation with parametrized bit width
Signed serial-/parallel multiplication

A straightforward method to multiply two binary numbers is to repeatedly shift the first argument a, and add to a register if the corresponding bit in the other argument b is set. The...

## Introduction to FPGA Technology

May 12, 2011
Overview

FPGA stands for Field Programmable Gate Array. An FPGA is an integrated circuit (IC) that can be programmed and configured by the embedded system developer in the field after it has been manufactured. FPGA is a semi-conductor device which is not limited to any pre-defined hardware function; it is rather highly flexible in its functionality and may be configured by the embedded system developer according to his design requirements. FPGAs use pre-built logic blocks and programmable...

## How to start in FPGA development? - Simulation software tools

September 19, 20128 comments
Introduction

This post is related to the first post How to start in FPGA development? - Some tips which aimed to show other options to work on the simulation of your project. In this first approach will be explained some advantages and disadvantages of using Xilinx ISE (+ModelSim) or using ModelSim, Precision and Xilinx ISE. And finally my opinion of which are the ones I...

## Spline interpolation

May 11, 20142 comments

A cookbook recipe for segmented y=f(x) 3rd-order polynomial interpolation based on arbitrary input data. Includes Octave/Matlab design script and Verilog implementation example. Keywords: Spline, interpolation, function modeling, fixed point approximation, data fitting, Matlab, RTL, Verilog

Introduction

Splines describe a smooth function with a small number of parameters. They are well-known for example from vector drawing programs, or to define a "natural" movement path through given...

## FPGA Bloggers Needed - New Reward System

April 11, 20112 comments

Are you an FPGA expert? If you are an have an interest in sharing your knowledge with the FPGA community, you might be interested in the new reward system for bloggers (see the blogs section here).

The rewards will be based on page impressions, meaning that the more traffic a blog post will get, the faster it will generate rewards for the author.

Basically, a given blog post will generate $25 to the author for every 250 unique pageviews, up to a maximum total reward of$500 per blog post...

## New Design - Finally!

April 29, 20093 comments

For those of you who are familiar with my work, you already know that FPGARelated.com is not the only engineering web site that I publish. I also publish DSPRelated.com and EmbeddedRelated.com. Those two web sites have been on a new design for quite some time now and porting the new design to FPGARelated.com has been on my todo list for too long!  I am glad today to announce that I have finally found the time to apply the more modern design to FPGARelated.com.

Thank you...

## New Discussion Group: DSP & FPGA

September 11, 20078 comments

I have just created a new discussion group for engineers implementing DSP functions on FPGAs. The creation of this group has been on my todo list for a long time. If you want to join the group, send a blank email to: fpgadsp-subscribe@yahoogroups.com

As usual, it should take a few weeks before there are enough members for interesting discussions to get started.