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The 2025 DSP Online Conference

Polynomial Math

Mike November 3, 20152 comments

Elliptic Curve Cryptography is used as a public key infrastructure to secure credit cards, phones and communications links. All these devices use either FPGA's or embedded microprocessors to compute the algorithms that make the mathematics work. While the math is not hard, it can be confusing the first time you see it.  This blog is an introduction to the operations of squaring and computing an inverse over a finite field which are used in computing Elliptic Curve arithmetic. ...


Welcoming MANY New Bloggers!

Stephane Boucher October 27, 20153 comments

The response to the latest call for bloggers has been amazing and I am very grateful.

In this post I present to you the individuals who, so far (I am still receiving applications at an impressive rate and will update this page as more bloggers are added),  have been given access to the blogging interface.  I am very pleased with the positive response and I think the near future will see the publication of many great articles, given the quality of the...


Recruiting New Bloggers!

Stephane Boucher October 16, 20157 comments

Previous calls for bloggers have been very successful in recruiting some great communicators - Rick LyonsJason Sachs, Victor Yurkovsky, Mike Silva, Markus NentwigGene BrenimanStephen Friederichs,


Summer of Gateware

Christopher Felton September 18, 2015

This (last) summer the MyHDL project participated in the Google Summer of Code (GSoC) as a sub-organization under the Python Software Foundation (PSF). This was our first year participating - there was a lot for us to learn.  Overall it was a worthwhile and beneficial activity.

Being a first time sub-org we were limited to a maximum of two students.  We had nine students apply and twelve mentors volunteer.  Only being able to select two students...


Tools of the Trade: reading PDFs (and keeping bookmarks)

Victor Yurkovsky July 7, 20155 comments

In this article I will take a look at the wonderful MuPDF viewer and present a small modification that saves bookmarks alongside the pdf files, making it infinitely more useful.

Some days I sit down to work and wonder how anything ever gets done. A simple example.  When I work on an FPGA design, I wind up with 3 or 4 screens full of documentation, generally in PDF format.  There are the Xilinx manuals, the various tool manuals, language reference manuals, you name it.  While...


Inside the Spartan-6: Using LUTs to optimize circuits

Victor Yurkovsky June 24, 20153 comments

While building a small CPU on a Spartan-6 chip I came across the same old problem: my Verilog was mapping to a lot of slices . Way more then seems reasonable. So let's dig in and see what's really going on.  

The J1 CPU (see Messing Around with a J1) is an amazingly streamlined design expressed in just over 100 lines of Verilog, and is reasonably compact at 150 Spartan-6 slices (half of that with the modifications described in the article).  But the Picoblaze is...


Homebrew CPUs: Color Languages

Victor Yurkovsky June 17, 2015
Color Languages

Here on bizarro we program using -- get this – text!  Our other senses - hearing, touch, smell, are not used at all. Even our visual perception is greatly underutilized - we just use two-dimensional text on a flat display a foot in front of our eyes.

Color is just beginning to be used, although in a lame syntax coloring way only. Granted, it makes it easier to detect stupid syntax errors such as misspelled keywords. Sadly, color carries zero semantic or...


Homebrew CPUs: Messing around with a J1

Victor Yurkovsky May 29, 2015

In this article I will examine James Bowman's excellent J1 CPU; I will then proceed to mess around with various parts of it, making it smaller, more appropriate to my particular application, and possibly faster.  I hope this will show you how easy it is to fiddle around with homemade CPUs and encourage you to make something weird and wonderful.

J1 CPU

My hat is off to James Bowman.  J1 is pretty cool.  It is a stack machine; it executes instructions in one cycle, it is...


Makefiles for Xilinx Tools

Victor Yurkovsky May 12, 20155 comments

Building a bitstream from an HDL is a complicated process that requires the cooperation of a lot of tools.  You can hide behind an IDE or grow a pair and use command line tools and a makefile to tie your build process together.  I am not a huge fan of makefiles either (I believe a language should be expressive enough to automate the build process), but the alternatives are dismal. 

Command-line driven workflow is easier on the hands and faster.  The example...


Use a Simple Microprogram Controller (MPC) to Speed Development of Complex Microprogrammed State Machines

Michael Morris April 18, 20152 comments
Introduction

This article will describe a synthesizable HDL-based microprogram controller (MPC), or microprogram sequencer (MPS), that can be used to provide the control of a microprogrammed state machine. Unlike the microprogrammed state machines that I described in my previous two articles, "Use Microprogramming to Save Resources and Add Functionality" and "Fit Sixteen (or more) Asynchronous Serial Receivers in the Area of a Standard UART", many microprogrammed state machines will...


StrangeCPU #4. Microcode

Victor Yurkovsky May 13, 20137 comments
Summary:

Sliding windows containing runs of microcode.

Table of Contents:

How to start in FPGA development? - Simulation software tools

Nuria Orduna September 19, 20128 comments
Introduction

This post is related to the first post How to start in FPGA development? - Some tips which aimed to show other options to work on the simulation of your project. In this first approach will be explained some advantages and disadvantages of using Xilinx ISE (+ModelSim) or using ModelSim, Precision and Xilinx ISE. And finally my opinion of which are the ones I...


The Spartans

Christopher Felton February 20, 20104 comments

The latest release of the Xilinx Spartan family is the Spartan6 line of FPGAs. It has been awhile since the last major Spartan released, the Spartan3, but this last year Xilinx released the Spartan6. The Xilinx Spartan family is the low cost FPGAs compared to the higher cost and high performance Virtex family. The Spartan family is derived from the Virtex architecture with some changes to reduce the cost. The Spartan3 FPGAs were derived from the Virtex-II architecture. Since the Spartan3...


Live Streaming from Embedded World!

Stephane Boucher February 12, 2019

For those of you who won't be attending Embedded World this year, I will try to be your eyes and ears by video streaming live from the show floor.   

I am not talking improvised streaming from a phone, but real, high quality HD streaming with a high-end camera and a device that will bond three internet connections (one wifi and two cellular) to ensure a steady, and hopefully reliable, stream. All this to hopefully give those of you who cannot be there in person a virtual...


Going back to Germany!

Stephane Boucher June 13, 20176 comments

A couple of blog posts ago, I wrote that the decision to go to ESC Boston ended up being a great one for many different reasons.  I came back from the conference energized and really happy that I went.  

These feelings were amplified a few days after my return when I received an email from Rolf Segger, the founder of SEGGER Microcontroller (check out their very new website), asking if I would be interested in visiting their headquarters...


Feedback Controllers - Making Hardware with Firmware. Part 7. Turbo-charged DSP Oscillators

Steve Maslen January 5, 20187 comments
This article will look at some DSP Sine-wave oscillators and will show how an FPGA with limited floating-point performance due to latency, can be persuaded to produce much higher sample-rate sine-waves of high quality. 

Comparisons will be made between implementations on Intel Cyclone V and Cyclone 10 GX FPGAs. An Intel numerically controlled oscillator


Feedback Controllers - Making Hardware with Firmware. Part I. Introduction

Steve Maslen August 22, 2017
Introduction to the topic 

This is the 1st in a series of articles looking at how we can use DSP and Feedback Control Sciences along with some mixed-signal electronics and number-crunching capability (e.g. FPGA), to create arbitrary (within reason) Electrical/Electronic Circuits with real-world connectivity. Of equal importance will be the evaluation of the functionality and performance of a practical design made from modestly-priced state of the art devices.

  • Part 1: 

FPGA or DSP Processor - Parameters to Make the Right Choice

Muhammad Yasir December 28, 20112 comments

Introduction

Digital Signal Processing (DSP) has a huge global market that is growing fast day by day with rapidly evolving sophisticated modern electronics applications like 3G wireless, voice over internet protocol (VoIP), multimedia systems, radar and satellite systems, medical systems, image-processing applications and consumer electronics. These sophisticated DSP applications pose many conflicting challenges to system designers and application developers in terms of cost and...


Why I would choose an FPGA development board?

Pablo Trujillo November 17, 20221 comment

Some years ago, when I went to the University, I bought some development boards based on different microcontrollers, and I remember that, although development boards were not expensive, I had to add to the price of the board, the shipping costs and the taxes, which were more than the 50% of the price of the board, but there are no option if I wanted to test that microcontroller. When I wanted to test some other feature, I had to buy a different board, for example, if I wanted to design some...


Launch of EmbeddedRelated.tv

Stephane Boucher February 21, 2019

With the upcoming Embedded Word just around the corner, I am very excited to launch the EmbeddedRelated.tv platform.  

This is where you will find the schedule for all the live broadcasts that I will be doing from Embedded World next week.  Please note that the schedule will be evolving constantly, even during the show, so I suggest your refresh the page often.  For instance, I am still unsure if I will be able to do the 'opening of the doors' broadcast as...


The 2025 DSP Online Conference