Point of View
I was caught of guard when someone commented:
"when a FIR filter is full of multiple loops and complex code, something is wrong"The comment was made during an informal discussion on alternative hardware description languages (HDL) and was targeted to the straightforward FIR filter implemented in MyHDL:
(different FIR description simulation results)
Personally, (and...
MyHDL Presentation Examples
The last two years I presented at EELive. The first year as an overview of MyHDL and a strong case why you should be using MyHDL as your hardware description language (HDL) [paper]. The second year was an introduction to three alternative HDLs (alt.hdl), including MyHDL. I also presented at a regional Python conferene: pyohio. At the Python conference I presented...
Spline interpolation
A cookbook recipe for segmented y=f(x) 3rd-order polynomial interpolation based on arbitrary input data. Includes Octave/Matlab design script and Verilog implementation example. Keywords: Spline, interpolation, function modeling, fixed point approximation, data fitting, Matlab, RTL, Verilog
IntroductionSplines describe a smooth function with a small number of parameters. They are well-known for example from vector drawing programs, or to define a "natural" movement path through given...
[Comments] C HLS Benefits
Earlier this week I posted a small write-up comparing a hardware median calculation implemented in a C-to gates "HLS" (Vivado C HLS) and a version in MyHDL. For a long time I have had the belief that C-to-gate technologies are of little to no benefit - based on the simple premise that "C" is not that high-level of a language (I actually consider it lower than Verilog and VHDL ... but that is a conversation for another time).
Language comparisons...
Little to no benefit from C based HLS
Last updated 07-Nov-2015
As I write this I am on a plane and my destination is EELive 2014 where I am going to give a talk hardware design: the grunge era. It is a shotgun introduction to three alternative hardware description languages (alt.hdl). The three languages briefly introduced in the talk are: bsv, chisel, and myhdl. The goal of the talk is simply to raise awareness of the three...
Signed serial-/parallel multiplication
Keywords: Binary signed multiplication implementation, RTL, Verilog, algorithm
Summary- A detailed discussion of bit-level trickstery in signed-signed multiplication
- Algorithm based on Wikipedia example
- Includes a Verilog implementation with parametrized bit width
A straightforward method to multiply two binary numbers is to repeatedly shift the first argument a, and add to a register if the corresponding bit in the other argument b is set. The...
MyHDL Interface Example
MyHDL Interfaces ExampleWith the next release of MyHDL, version 0.9, conversion of interfaces will be supported. In this context an interface is any object with a Signal attribute. This can be used to simplify connection between modules and port definitions. For example, if I want to define a simple memory-map bus, the Signals for the bus can be defined as follows:
class BareBoneBus: def __init__(self): self.wr = Signal(False) self.rd =...MyHDL @EDAPlayground
Trying out MyHDL became a little easier recently. MyHDL is now avaialbe @EDAPlayground. One can experiment with Python/MyHDL verification of HDL modules and implementing complex digital cirucits in MyHDL.
The @EDAPlayground has two main panels. On the left is the testbench and the right the HDL description to be tested.
There are a couple examples...
BGA and QFP at Home 1 - A Practical Guide.
It is almost universally accepted by the hobbyists that you can't work with high-density packages at home. That is entirely incorrect. I've been assembling and reflowing BGA circuit boards at home for a few years now. BGAs and 0.5mm-pitch QFPs are well within the realm of a determined amateur.
This series of articles presents practical information on designing and assembling boards with high-density packages at home. While the focus is on FPGA packages, most of...
Windows XP and Win32 - the Platform of the Future!
Over the past decade I often wondered why anyone uses Windows. It's just so... proprietary. And pedestrian. As I grew up my OS of choice went nothing to CPM to DOS (on Apple ][), GEM on Atari ST, MS-DOS, DOS extenders, Mac OS, Windows NT, Windows XP, Linux... Now, I again find myself a fan of Windows XP, the platform of the future. (I am still a fan of bare metal, of course).Maybe I am not totally serious, but I, a self-proclaimed freedom lover and...
Little to no benefit from C based HLS
Last updated 07-Nov-2015
As I write this I am on a plane and my destination is EELive 2014 where I am going to give a talk hardware design: the grunge era. It is a shotgun introduction to three alternative hardware description languages (alt.hdl). The three languages briefly introduced in the talk are: bsv, chisel, and myhdl. The goal of the talk is simply to raise awareness of the three...
Going back to Germany!
A couple of blog posts ago, I wrote that the decision to go to ESC Boston ended up being a great one for many different reasons. I came back from the conference energized and really happy that I went.
These feelings were amplified a few days after my return when I received an email from Rolf Segger, the founder of SEGGER Microcontroller (check out their very new website), asking if I would be interested in visiting their headquarters...
USB-FPGA : Introduction
This blog is an introduction to a series of blogs I hope to write. The blogs will cover the design and experiences I had on a project that spanned the last 6 years. The project was the development of an USB FPGA board and the supporting gateware, firmware, and software. The project has had different levels of activity over the years, ranging from none to some, but it has been an ongoing project, albeit, during sleepless nights. Lately, I have ported the HDL (gateware)...
StrangeCPU #3. Instruction Slides - The Strangest CPU Yet!
Summary:Decoding instructions with a Sliding Window system. 0-Bit Sliding Register Windows.
Table of Contents:- Part 1: A new CPU - technology review, re-examination of the premises; StrangeCPU concepts; x86 notes.
- Part 2: Sliding-Window Token Machines, an in-depth exploration of this curious technology; ARM notes.
- Part 3. Instruction Slides - The Strangest CPU Yet! Decoding instructions with a Sliding...
Recruiting New Bloggers!
Previous calls for bloggers have been very successful in recruiting some great communicators - Rick Lyons, Jason Sachs, Victor Yurkovsky, Mike Silva, Markus Nentwig, Gene Breniman, Stephen Friederichs,
Sensors Expo - Trip Report & My Best Video Yet!
This was my first time at Sensors Expo and my second time in Silicon Valley and I must say I had a great time.
Before I share with you what I find to be, by far, my best 'highlights' video yet for a conference/trade show, let me try to entertain you with a few anecdotes from this trip. If you are not interested by my stories or maybe don't have the extra minutes needed to read them, please feel free to skip to the end of this blog post to watch the...
New Comments System (please help me test it)
I thought it would take me a day or two to implement, it took almost two weeks...
But here it is, the new comments systems for blogs, heavily inspired by the forum system I developed earlier this year.
Which means that:
- You can easily add images, either by drag and drop or through the 'Insert Image' button
- You can add MathML, TeX and ASCIImath equations and they will be rendered with Mathjax
- You can add code snippets and they will be highlighted with highlights.js
- You can edit...
Designing Embedded System with FPGA - 1
With the introduction of soft processors and related tools (like EDK from Xilinx), implementation of basic embedded system in FPGA is made easy. This requires very little or almost no knowledge of VHDL programming. Actually that’s how I started. If user is interested in taking full advantage of FPGA and its parallel processing power, then yes, detail understanding of soft processor, its peripheral bus and VHDL programming is required.
I will start with...
FPGA or DSP Processor - Parameters to Make the Right Choice
Introduction
Digital Signal Processing (DSP) has a huge global market that is growing fast day by day with rapidly evolving sophisticated modern electronics applications like 3G wireless, voice over internet protocol (VoIP), multimedia systems, radar and satellite systems, medical systems, image-processing applications and consumer electronics. These sophisticated DSP applications pose many conflicting challenges to system designers and application developers in terms of cost and...
FPGA Assemblers and Time Machines
Flashback to 1986. A young man has a crazy idea - he wants to make a CPU all by himself. He is reading early Xilinx manuals cover to cover as if they were novels. Yes, you are quick - this is indeed a (mostly) true story about me and my dream, suddenly made possible by this new FPGA technology.
Sadly more than 20 years went by before my first CPU ran in a Xilinx FPGA. Why did it take so long? Every few years I set up the tools and every time I walked away, scared silly. As the years...
Going back to Germany!
A couple of blog posts ago, I wrote that the decision to go to ESC Boston ended up being a great one for many different reasons. I came back from the conference energized and really happy that I went.
These feelings were amplified a few days after my return when I received an email from Rolf Segger, the founder of SEGGER Microcontroller (check out their very new website), asking if I would be interested in visiting their headquarters...
Feedback Controllers - Making Hardware with Firmware. Part I. Introduction
Introduction to the topic
This is the 1st in a series of articles looking at how we can use DSP and Feedback Control Sciences along with some mixed-signal electronics and number-crunching capability (e.g. FPGA), to create arbitrary (within reason) Electrical/Electronic Circuits with real-world connectivity. Of equal importance will be the evaluation of the functionality and performance of a practical design made from modestly-priced state of the art devices.
- Part 1:
New Comments System (please help me test it)
I thought it would take me a day or two to implement, it took almost two weeks...
But here it is, the new comments systems for blogs, heavily inspired by the forum system I developed earlier this year.
Which means that:
- You can easily add images, either by drag and drop or through the 'Insert Image' button
- You can add MathML, TeX and ASCIImath equations and they will be rendered with Mathjax
- You can add code snippets and they will be highlighted with highlights.js
- You can edit...
3 Good News
Good News #1Last week, I announced a new and ambitious reward program that will be funded by the new Vendors Directory.
This week, I am happy to announce that we have our firsts two sponsors! Quantum Leaps & Abelon Systems have agreed to pay the sponsorship fee to be listed in the new Vendors Directory. Because of their support, there is now some money in the reward pool ($1,000) and enough to pay for the firsts 500 'beers' awarded. Please...
An absolute position encoder VHDL core
Introduction
Let's consider motorized systems controlled by electronics. A closed loop architecture looks like this:
The following components are involved:
- the motor itself (DC, stepper ...),
- the controller, in charge of computing position according to the whole system state,
- the driver board in charge of generating signals and power for the motor,
- the position encoder, the subject of this post.
Most of the time, there is a difference between the position the system...
Windows XP and Win32 - the Platform of the Future!
Over the past decade I often wondered why anyone uses Windows. It's just so... proprietary. And pedestrian. As I grew up my OS of choice went nothing to CPM to DOS (on Apple ][), GEM on Atari ST, MS-DOS, DOS extenders, Mac OS, Windows NT, Windows XP, Linux... Now, I again find myself a fan of Windows XP, the platform of the future. (I am still a fan of bare metal, of course).Maybe I am not totally serious, but I, a self-proclaimed freedom lover and...
Introducing the VPCIe framework
IntroductionMy daily work involves platforms featuring an embedded CPU communcating with a FPGA device over a PCI Express link (PCIe for short). The main purpose of this link is for the CPU to convey configuration, control, and status commands to hardware slaves implemented in the FPGA. For data intensive applications (2D XRay detector readout backend), this link can also be used as a DMA channel to transfer data from the FPGA to the CPU memory. Finally, a slave can interrupt the CPU using...
Who else is going to Sensors Expo in San Jose? Looking for roommate(s)!
This will be my first time attending this show and I must say that I am excited. I am bringing with me my cameras and other video equipment with the intention to capture as much footage as possible and produce a (hopefully) fun to watch 'highlights' video. I will also try to film as many demos as possible and share them with you.
I enjoy going to shows like this one as it gives me the opportunity to get out of my home-office (from where I manage and run the *Related sites) and actually...
FPGA Bloggers Needed - New Reward System
Are you an FPGA expert? If you are an have an interest in sharing your knowledge with the FPGA community, you might be interested in the new reward system for bloggers (see the blogs section here).
The rewards will be based on page impressions, meaning that the more traffic a blog post will get, the faster it will generate rewards for the author.
Basically, a given blog post will generate $25 to the author for every 250 unique pageviews, up to a maximum total reward of $500 per blog post...
Feedback Controllers - Making Hardware with Firmware. Part 9. Closing the low-latency loop
It's time to put together the DSP and feedback control sciences, the evaluation electronics, the Intel Cyclone floating-point FPGA algorithms and the built-in control loop test-bed and evaluate some example designs. We will be counting the nanoseconds and looking for textbook performance in the creation of emulated hardware circuits. Along the way, there is a printed circuit board (PCB) issue to solve using DSP.
Fig 1. The evaluation platform
Additional design...
