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BGA and QFP at Home 1 - A Practical Guide.

Victor Yurkovsky October 13, 20134 comments

It is almost universally accepted by the hobbyists that you can't work with high-density packages at home.  That is entirely incorrect.  I've been assembling and reflowing BGA circuit boards at home for a few years now.  BGAs and 0.5mm-pitch QFPs are well within the realm of a determined amateur. 

This series of articles presents practical information on designing and assembling boards with high-density packages at home.  While the focus is on FPGA packages, most of...


Windows XP and Win32 - the Platform of the Future!

Victor Yurkovsky October 6, 20132 comments

Over the past decade I often wondered why anyone uses Windows.  It's just so... proprietary.  And pedestrian.  As I grew up my OS of choice went nothing to CPM to DOS (on Apple ][), GEM on Atari ST,  MS-DOS, DOS extenders, Mac OS, Windows NT, Windows XP, Linux...  Now, I again find myself a fan of Windows XP, the platform of the future.  (I am still a fan of bare metal, of course).Maybe I am not totally serious, but I, a self-proclaimed freedom lover and...


Introducing the VPCIe framework

Fabien Le Mentec August 31, 20133 comments
Introduction

My daily work involves platforms featuring an embedded CPU communcating with a FPGA device over a PCI Express link (PCIe for short). The main purpose of this link is for the CPU to convey configuration, control, and status commands to hardware slaves implemented in the FPGA. For data intensive applications (2D XRay detector readout backend), this link can also be used as a DMA channel to transfer data from the FPGA to the CPU memory. Finally, a slave can interrupt the CPU using...


binary hello world

Christopher Felton August 3, 20132 comments
Python + Ohio + MyHDL + FPGA

Recently I had the opportunity to coordinate a hands-on programmable hardware (FPGA) workshop (open-space) at a regional Python conference - @pyohio. The workshop was for those that had little to no exposure to programmable hardware. For this situation I used two basic examples: two versions of a binary hello world.

The binary hello world -- blinking an LED -- is a good starting point to introduce programmable hardware, hardware descriptions languages,...


Tool install for examples

Christopher Felton August 2, 20132 comments

Most of my examples on fpgarelated use MyHDL for the hardware description and another Python package myhdl_tools rhea.build to control the FPGA vendor's software. This means everything is controlled and run from the Python environment.

Install the following to compile the posted examples:

MyHDL package : pip myhdl or myhdl github myhdl_tools : myhdl_tools bitbucket rhea...

Shared-multiplier polyphase FIR filter

Markus Nentwig July 31, 20136 comments

Keywords: FPGA, interpolating decimating FIR filter, sample rate conversion, shared multiplexed pipelined multiplier

Discussion, working code (parametrized Verilog) and Matlab reference design for a FIR polyphase resampler with arbitrary interpolation and decimation ratio, mapped to one multiplier and RAM.

Introduction

A polyphase filter can be as straightforward as multirate DSP ever gets, if it doesn't turn into a semi-deterministic, three-legged little dance between input, output and...


PC and SP for a small CPU

Victor Yurkovsky July 23, 2013

Ok, let's make a small stack-based CPU.

I will start where the rubber meets the road - the PC/stack subsystem that I like referring to as the 'legs'. As usual, I will present a design with a twist.

Not having a large design team, deadlines and million-dollar fab runs when designing CPUs creates a truly different environment. I can actually sit at the kitchen table and doodle around with CPU designs to my heart's content. I can try really ridiculous approaches, and work without a...


What do Ohio, Python, and FPGAs have in common?

Christopher Felton July 23, 2013

Anyone in the Columbus Ohio area in the United States this upcoming weekend (7/27 and 7/28) should stop by the @pyohio conference.  This is a *FREE* regional python conference.  I will be giving a talk at the end of the day Sunday, discussing MyHDL, FPGAs, and a hands-on workshop following the presentation.

The talk will focus on introducing programmable hardware to "imperative thinkers".  Anyone curious about FPGAs, Python, or familiar with FPGAs or embedded...


How FPGAs work, and why you'll buy one

Yossi Kreinin June 20, 201315 comments

Today, pretty much everyone has a CPU, a DSP and a GPU, buried somewhere in their PC, phone, car, etc. Most don't know or care that they bought any of these, but they did.

Will everyone, at some future point, also buy an FPGA? The market size of FPGAs today is about 1% of the annual global semiconductor sales (~$3B vs ~$300B). Will FPGA eventually...


Learning VHDL - Basics

Enrico Garante June 15, 20135 comments

Since FPGA are becoming more accessible to the hobbyist, learning how to use them can be really useful for certain applications, like DSP and video generation; moreover, engineers that are able to code in VHDL/Verilog are always requested on the job market.

In this tutorial I will cover the basics of Xilinx ISE and VHDL. I willl base my code on the Basys2 board from Digilent: it is really cheap (especially for students) and has a lot of features on board, as you can see from the picture...


Feedback Controllers - Making Hardware with Firmware. Part 2. Ideal Model Examples

Steve Maslen August 24, 2017
Developing and Validating Simulation Models

This article will describe models for simulating the systems and controllers for the hardware emulation application described in Part 1 of the series.


Feedback Controllers - Making Hardware with Firmware. Part 4. Engineering of Evaluation Hardware

Steve Maslen October 10, 2017
Following on from the previous abstract descriptions of an arbitrary circuit emulation application for low-latency feedback controllers, we now come to some aspects in the hardware engineering of an evaluation design from concept to first power-up. In due course a complete specification along with  application  examples will be maintained on the project website. 

MyHDL synthesis: from browser to FPGA in five seconds

Martin Strubel May 22, 2020

When it comes to feeding (mostly proprietary) synthesis tools, the most widely supported HDL (hardware design language) is probably plain Verilog, then comes VHDL. The reasons for that are simply based on popularity or the fact that VHDL is a little more complex to parse.

So, all super-HDLs (like Chisel, SpinalHDL, etc.) transfer to one of these V* HDLs in one way or another, then synthesis/mapping/place'n'route turns it into a wiring map for the silicon. Same went for MyHDL or its also...


Helping New Bloggers to Break the Ice: A New Ipad Pro for the Author with the Best Article!

Stephane Boucher November 9, 2015

Breaking the ice can be tough. Over the years, many individuals have asked to be given access to the blogging interface only to never post an article.


Use a Simple Microprogram Controller (MPC) to Speed Development of Complex Microprogrammed State Machines

Michael Morris April 18, 20152 comments
Introduction

This article will describe a synthesizable HDL-based microprogram controller (MPC), or microprogram sequencer (MPS), that can be used to provide the control of a microprogrammed state machine. Unlike the microprogrammed state machines that I described in my previous two articles, "Use Microprogramming to Save Resources and Add Functionality" and "Fit Sixteen (or more) Asynchronous Serial Receivers in the Area of a Standard UART", many microprogrammed state machines will...


FPGA Bloggers Needed - New Reward System

Stephane Boucher April 11, 20112 comments

Are you an FPGA expert? If you are an have an interest in sharing your knowledge with the FPGA community, you might be interested in the new reward system for bloggers (see the blogs section here).

The rewards will be based on page impressions, meaning that the more traffic a blog post will get, the faster it will generate rewards for the author.

Basically, a given blog post will generate $25 to the author for every 250 unique pageviews, up to a maximum total reward of $500 per blog post...


Feedback Controllers - Making Hardware with Firmware. Part 3. Sampled Data Aspects

Steve Maslen September 9, 2017
Some Design and Simulation Considerations for Sampled-Data Controllers

This article will continue to look at some aspects of the controllers and electronics needed to create emulated physical circuits with real-world connectivity and will look at the issues that arise in sampled-data controllers compared to continuous-domain controllers. As such, is not intended as an introduction to sampled-data systems.


USB-FPGA : Introduction

Christopher Felton January 12, 20111 comment

This blog is an introduction to a series of blogs I hope to write.  The blogs will cover the design and experiences I had on a project that spanned the last 6 years.  The project was the development of an USB FPGA board and the supporting gateware, firmware, and software.  The project has had different levels of activity over the years, ranging from none to some, but it has been an ongoing project, albeit, during sleepless nights.  Lately, I have ported the HDL (gateware)...


Feedback Controllers - Making Hardware with Firmware. Part 5. Some FPGA Aspects.

Steve Maslen November 14, 2017
This part of the on-going series of articles looks at a variety of aspects concerning the FPGA device which provides the high-speed maths capability for the low-latency controller and the arbitrary circuit generator application. In due course a complete specification along with  application  examples will be maintained on the project website here.