StrangeCPU #2. Sliding Window Token Machines
Summary:
An in-depth exploration of Sliding Window Token Machines; ARM notes.
Table of Contents:- Part 1: A new CPU - technology review, re-examination of the premises; StrangeCPU concepts; x86 notes.
- Part 2: Sliding-Window Token Machines, an in-depth exploration of this curious technology; ARM notes.
- Part 3. Instruction Slides - The Strangest CPU Yet! Decoding instructions with a Sliding Window...
StrangeCPU #1. A new CPU
Summary: In this multi-part series I will share with you a design, implementation notes and code for a slightly different kind of a CPU featuring a novel token machine that resolves an 8-bit token to pretty much any address in a 32-bit or even 64-bit address space, using not much more than an adder.
Table of Contents:- Part 1: A new CPU - technology review, re-examination of the premises; StrangeCPU concepts; x86 notes.
MyHDL Resources and Projects
Last updated 07-Nov-2017
MyHDL ResourcesIf you want to dive into MyHDL (digital hardware description in Python) there are many resources available. Below is a list of MyHDL resources, including some of the past blogs here on fpgarelated.
The MyHDL manual is a great (probably the best) place to get started.
The manual is an in-depth introduction to MyHDL. The concepts are well explained and there are examples to test while working through the...
Two jobs
For those of you following closely embeddedrelated and the other related sites, you might have noticed that I have been less active for the last couple of months, and I will use this blog post to explain why. The main reason is that I got myself involved into a project that ended up using a better part of my cpu than I originally thought it would.
edit - video of the event:
I currently have two jobs: one as an electrical/dsp engineer recycled as a web publisher and the other...
VGA Output in 7 Slices. Really.
Ridiculous? Read on - I will show you how to generate VGA timing in seven XilinxR Spartan3R slices.Some time ago I needed to output video to a VGA monitor for my Apple ][ FPGA clone. Obviously (I thought), VGA's been done before and all I had to do was find some Verilog code and drop it into my design. As is often the case (with me anyway), the task proved to be very different from my imagined 'couple of hours to integrate the IP'.I found some example code for my board. I...
How to start in FPGA development? - Simulation software tools
Introduction
This post is related to the first post How to start in FPGA development? - Some tips which aimed to show other options to work on the simulation of your project. In this first approach will be explained some advantages and disadvantages of using Xilinx ISE (+ModelSim) or using ModelSim, Precision and Xilinx ISE. And finally my opinion of which are the ones I...
MyHDL FPGA Tutorial II cont. (Echo, Audio Interface)
IntroductionTo demonstrate the echo on an FPGA board an interface to an audio ADC/DAC chip will be used. The following will explain the connection to the audio codec and the HDL module used to interface.
Audio Codec InterfaceI have two boards with TI AIC23b audio codecs. The AIC23 has a configuration interface (ability to program the registers) and a streaming audio interface. The SPI mode will be used to configure the codec and the I2S interface is used to send and...
FPGA Assemblers and Time Machines
Flashback to 1986. A young man has a crazy idea - he wants to make a CPU all by himself. He is reading early Xilinx manuals cover to cover as if they were novels. Yes, you are quick - this is indeed a (mostly) true story about me and my dream, suddenly made possible by this new FPGA technology.
Sadly more than 20 years went by before my first CPU ran in a Xilinx FPGA. Why did it take so long? Every few years I set up the tools and every time I walked away, scared silly. As the years...
How to start in FPGA development? - Some tips
IntroductionThe aim of this tutorial is to show some useful tips for people like me that one day started from zero to work with FPGA's. Why FPGA's? Because they are easy to use and they are not too expensive, and they are usually used in lab courses to let students "play" with them.
1: How to choose the right FPGA?As you may know there are a lot of different FPGA's, brands and models. How to choose the right one? It's very difficult to say that before knowing which will be the...
MyHDL FPGA Tutorial II (Audio Echo)
IntroductionThis tutorial will walk through an audio echo that can be implemented on an FPGA development board. This tutorial is quite a bit more involved than the previous MyHDL FPGA tutorial. This project will require an FPGA board with an audio codec and the interface logic to the audio codec.
Review the Previous TutorialThe previous MyHDL FPGA tutorial I posted a strobing LED on an FPGA board. In that tutorial we introduced the basics of a MyHDL module....
Crowdfunding Articles?
Many of you have the knowledge and talent to write technical articles that would benefit the EE community. What is missing for most of you though, and very understandably so, is the time and motivation to do it.
But what if you could make some money to compensate for your time spent on writing the article(s)? Would some of you find the motivation and make the time?
I am thinking of implementing a system/mechanism that would allow the EE community to...
Who else is going to Sensors Expo in San Jose? Looking for roommate(s)!
This will be my first time attending this show and I must say that I am excited. I am bringing with me my cameras and other video equipment with the intention to capture as much footage as possible and produce a (hopefully) fun to watch 'highlights' video. I will also try to film as many demos as possible and share them with you.
I enjoy going to shows like this one as it gives me the opportunity to get out of my home-office (from where I manage and run the *Related sites) and actually...
Designing Embedded System with FPGA - 1
With the introduction of soft processors and related tools (like EDK from Xilinx), implementation of basic embedded system in FPGA is made easy. This requires very little or almost no knowledge of VHDL programming. Actually that’s how I started. If user is interested in taking full advantage of FPGA and its parallel processing power, then yes, detail understanding of soft processor, its peripheral bus and VHDL programming is required.
I will start with...
USB-FPGA : Introduction
This blog is an introduction to a series of blogs I hope to write. The blogs will cover the design and experiences I had on a project that spanned the last 6 years. The project was the development of an USB FPGA board and the supporting gateware, firmware, and software. The project has had different levels of activity over the years, ranging from none to some, but it has been an ongoing project, albeit, during sleepless nights. Lately, I have ported the HDL (gateware)...
3 Good News
Good News #1Last week, I announced a new and ambitious reward program that will be funded by the new Vendors Directory.
This week, I am happy to announce that we have our firsts two sponsors! Quantum Leaps & Abelon Systems have agreed to pay the sponsorship fee to be listed in the new Vendors Directory. Because of their support, there is now some money in the reward pool ($1,000) and enough to pay for the firsts 500 'beers' awarded. Please...
ESC Boston's Videos are Now Up
In my last blog, I told you about my experience at ESC Boston and the few videos that I was planning to produce and publish. Here they are, please have a look and any feedback (positive or negative) is appreciated.
Short HighlightThis is a very short (one minute) montage of some of the footage that I shot at the show & conference. In future shows, I absolutely need to insert clips here and there of engineers saying a few words about the conference (why they...
Finally got a drone!
As a reader of my blog, you already know that I have been making videos lately and thoroughly enjoying the process. When I was in Germany early this summer (and went 280 km/h in a porsche!) to produce SEGGER's 25th anniversary video, the company bought a drone so we could get an aerial shot of the party (at about the 1:35 mark in this video). Since then, I have been obsessing on buying a drone for myself and finally made the move a few weeks ago - I acquired a used DJI...
The Spartans
The latest release of the Xilinx Spartan family is the Spartan6 line of FPGAs. It has been awhile since the last major Spartan released, the Spartan3, but this last year Xilinx released the Spartan6. The Xilinx Spartan family is the low cost FPGAs compared to the higher cost and high performance Virtex family. The Spartan family is derived from the Virtex architecture with some changes to reduce the cost. The Spartan3 FPGAs were derived from the Virtex-II architecture. Since the Spartan3...
Mathematics and Cryptography
The mathematics of number theory and elliptic curves can take a life time to learn because they are very deep subjects. As engineers we don't have time to earn PhD's in math along with all the things we have to learn just to make communications systems work. However, a little learning can go a long way to helping make our communications systems secure - we don't need to know everything. The following articles are broken down into two realms, number theory and elliptic...
PicoBlaze - Program RAM Access for an Interactive Monitor
I have a confession to make: I love PicoBlaze! There are many reasons to love it. It is a tiny CPU (96 Spartan3 slices or 26 Spartan6 slices plus a BRAM). It is simple. It is bug-free. It's pretty fast. It can reduce the size and the complexity of your design - instead of debugging a big state machine, just throw one (or more) of these in. Add a serial output and you can debug your fpga from inside out!However, there are a few problems. The...
Ancient History
The other day I was downloading an IDE for a new (to me) OS. When I went to compile some sample code, it failed. I went onto a forum, where I was told "if you read the release notes you'd know that the peripheral libraries are in a legacy download". Well damn! Looking back at my previous versions I realized I must have done that and forgotten about it. Everything changes, and keeping up with it takes time and effort.
When I first started with microprocessors we...
MyHDL Interface Example
MyHDL Interfaces ExampleWith the next release of MyHDL, version 0.9, conversion of interfaces will be supported. In this context an interface is any object with a Signal attribute. This can be used to simplify connection between modules and port definitions. For example, if I want to define a simple memory-map bus, the Signals for the bus can be defined as follows:
class BareBoneBus: def __init__(self): self.wr = Signal(False) self.rd =...State Machine ‘v’ Micro in a FPGA
Designing a system and considering if to have a FPGA in the first place is something a engineer should always consider. However one thing that people look to do is designing a microcontroller on a FPGA and in this post I want to consider why we would do it at all and what would be the real consideration for doing this.
We first look at what's available in the microcontroller world. We have a vast range from tiny 8bit 6 pin devices right the way up to monster 32bit devices. These...
Feedback Controllers - Making Hardware with Firmware. Part 3. Sampled Data Aspects
Some Design and Simulation Considerations for Sampled-Data Controllers
This article will continue to look at some aspects of the controllers and electronics needed to create emulated physical circuits with real-world connectivity and will look at the issues that arise in sampled-data controllers compared to continuous-domain controllers. As such, is not intended as an introduction to sampled-data systems.
- Part 1: Introduction
Use a Simple Microprogram Controller (MPC) to Speed Development of Complex Microprogrammed State Machines
Introduction
This article will describe a synthesizable HDL-based microprogram controller (MPC), or microprogram sequencer (MPS), that can be used to provide the control of a microprogrammed state machine. Unlike the microprogrammed state machines that I described in my previous two articles, "Use Microprogramming to Save Resources and Add Functionality" and "Fit Sixteen (or more) Asynchronous Serial Receivers in the Area of a Standard UART", many microprogrammed state machines will...
Feedback Controllers - Making Hardware with Firmware. Part 8. Control Loop Test-bed
This part in the series will consider the signals, measurements, analyses and configurations for testing high-speed low-latency feedback loops and their controllers. Along with basic test signals, a versatile IFFT signal generation scheme will be discussed and implemented. A simple controller under test will be constructed to demonstrate the analysis principles in preparation for the design and evaluation of specific controllers and closed-loop applications.
Additional design...One Clock Cycle Polynomial Math
Error correction codes and cryptographic computations are most easily performed working with $GF(2^n)$ polynomials. By using very special values of $n$ we can build circuits which multiply and square in one clock cycle on an FPGA. These circuits come about by flipping back and forth between a standard polynomial basis and a normal basis representation of elements in $GF(2^n)$.
A normal basis is yet another form of polynomial but instead of adding powers of $\beta$ we add...
Feedback Controllers - Making Hardware with Firmware. Part 4. Engineering of Evaluation Hardware
Following on from the previous abstract descriptions of an arbitrary circuit emulation application for low-latency feedback controllers, we now come to some aspects in the hardware engineering of an evaluation design from concept to first power-up. In due course a complete specification along with application examples will be maintained on the project website.- Part 1: Introduction
- Part 2:...
Elliptic Curve Key Exchange
Elliptic Curve Cryptography is used to create a Public Key system that allows two people (or computers) to exchange public data so that both sides know a secret that no one else can find in a reasonable time. The simplest method uses a fixed public key for each person. Once cracked, every message ever sent with that key is open. More advanced key exchange systems have "perfect forward secrecy" which means that even if one message key is cracked, no other message will...
